Product Guide
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Package
CAD
Models
Models
Product
Status
Status
Replacement
Part
Part
AEC-Q100
Qualified
Qualified
CPU
Control Interface
Clock Frequency
Max.
Max.
MHz
Input Voltage
Min.
Min.
V
Input Voltage
Max.
Max.
V
Flash Memory
KByte
EEPROM
Byte
SRAM
KByte
N-CH MOSFET VDS
Max.
Max.
V
N-CH MOSFET ID
Max.
Max.
A
N-CH MOSFET RDS(ON)
Typ.
Typ.
mΩ
P-CH MOSFET VDS
Max.
Max.
V
P-CH MOSFET ID
Max.
Max.
A
P-CH MOSFET RDS(ON)
Typ.
Typ.
mΩ
PWM Timer
CHs
Features
Operating
Temperature Range
Temperature Range
TSSOP-25P
New Product
N/A
-
ARM® Cortex®-M0
USART, SPI/I2S, I2C
48
7
24
16
256
4
24
5
14.6
-24
-5
47.9
4
Integrated three-phase brushless gate driver, 5V/50mA LDO, 3.3V/50mA LDO, 12-bit MSPS ADC, Reset circuit, Low-offset OPAx2, and 64-bit unique chip ID identifier
-40 to 85
- 1
*Remark of Product Status :
New Product
Active
NSND (Not Suggested for New Design)
EoL (End of Life)